Computing Swarms for Self-Adaptiveness and Self-Organization in Floating Point Array Processing

Advancements in CMOS technology enable the integration of a huge number of resources on the same
System-on-Chip. Managing such a growing complexity, including fault tolerance issues in deep sub-micron
technologies, is a hard challenge for hardware designers. Self-organization may represent a viable path
towards the development of massively parallel architectures in current and future technologies. This approach
is progressively more studied in multiprocessor architectures where, however, a further mindset
shift in terms of programming paradigm is required.
In this paper, self-organization and self-adaptiveness are exploited for the design of a co-processing unit
for array computations, supporting floating-point arithmetic. From the experience of previous explorations,
an architecture embodying some principle of Swarm Intelligence to pursue adaptability, scalability and
fault tolerance is proposed. The architecture realizes a loosely structured collection of hardware agents
implementing fixed behavioural rules aimed at the best exploitation of the available resources in whatever
kind of context without any hardware reconfiguration. Comparisons with off-the shelf VLIWDSP processors
on specific tasks reveal similar performance thus not paying the improved robustness with performance. The
multitasking capabilities, together with the intrinsic scalability,make this approach valuable also for future
extensions, especially in the field of neuronal networks simulators.